VLSI Analog IP design engineer

• 5 to 10 year of experience in Analog IP design
• Proven track record of end to end design – from concept, spec to tape-out with validated
• Experience in open source EDA tools
• Participate in technical leadership of the team in the areas of circuit design
• Provide Training and Mentorship to Junior Design Engineers working alongside
• Bachelor or Master degree in electrical engineering in relevant domain
• In depth familiarity with transistor level circuit design – sound CMOS design fundamentals
• Detailed design experience with analog IP  like  OPAMP, PLL, Voltage and Current mirrors, oscillators, bandgap reference, ADC, DAC etc..
• Aware of ESD issues (i.e. circuit techniques, layout)
• Familiarity with custom digital design (i.e. high-speed logic paths)
• Knowledge of design for reliability (i.e. EM, IR, aging, etc.)
• Knowledge of layout effects (i.e. matching, reliability, proximity effects, etc.)
• Experience with (opens source) tools for schematic entry, physical layout, and design verification
• Hands-on experience with physical layout of high-speed circuits is a plus
• Knowledge of SPICE simulators and simulation methods
• Knowledgeable in Verilog-A for analog behavioral modeling and simulation-control/data-capture
• Experience with TCL, Perl, C, Python, MATLAB, or other scripting languages is desired
• Good communication and documentation skill
• Job requires international travel also